Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2006-05-30
2010-10-19
Elmore, Stephen C (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S200000, C711S202000
Reexamination Certificate
active
07818516
ABSTRACT:
A memory controller connected to memory includes: an address reception unit for receiving an address code externally input together with a command; and a command conversion unit for outputting to the memory an MRS command to change the internal settings of the memory based on the address code when the address code input together with a first command specifies an address space for which the memory is not implemented.
REFERENCES:
patent: 5553025 (1996-09-01), Haraguchi
patent: 6469703 (2002-10-01), Aleksic et al.
patent: 2001/0024386 (2001-09-01), Harari et al.
patent: 2001/0047438 (2001-11-01), Forin
patent: 2003/0085731 (2003-05-01), Iwase et al.
patent: 2003/0097533 (2003-05-01), Maeda et al.
patent: 2004/0083334 (2004-04-01), Chang et al.
patent: 7-092242 (1995-04-01), None
Eto Satoshi
Kawabata Kuninori
Miyo Toshiya
Elmore Stephen C
Fujitsu Patent Center
Fujitsu Semiconductor Limited
Yu Jae U
LandOfFree
Memory controller, semiconductor memory, and memory system does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Memory controller, semiconductor memory, and memory system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory controller, semiconductor memory, and memory system will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4172807