Memory controller, semiconductor memory, and memory system

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

Reexamination Certificate

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C711S200000, C711S202000

Reexamination Certificate

active

07818516

ABSTRACT:
A memory controller connected to memory includes: an address reception unit for receiving an address code externally input together with a command; and a command conversion unit for outputting to the memory an MRS command to change the internal settings of the memory based on the address code when the address code input together with a first command specifies an address space for which the memory is not implemented.

REFERENCES:
patent: 5553025 (1996-09-01), Haraguchi
patent: 6469703 (2002-10-01), Aleksic et al.
patent: 2001/0024386 (2001-09-01), Harari et al.
patent: 2001/0047438 (2001-11-01), Forin
patent: 2003/0085731 (2003-05-01), Iwase et al.
patent: 2003/0097533 (2003-05-01), Maeda et al.
patent: 2004/0083334 (2004-04-01), Chang et al.
patent: 7-092242 (1995-04-01), None

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