Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2005-09-06
2005-09-06
Moazzami, Nasser (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C710S244000
Reexamination Certificate
active
06941428
ABSTRACT:
A memory controller, method and program product for memory controller optimization by active re-prioritization of requests based on memory bus activity. The invention continually monitors memory bus activity and, where necessary, re-prioritizes a queue of pending memory requests. In addition, mechanisms are provided to abort an existing request on a memory bus, and interrupt an existing request to complete a pending request.
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Hoffman Warnick & D'Alessandro LLC
International Business Machines - Corporation
Moazzami Nasser
Steinberg William H.
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