Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
2006-07-21
2011-11-01
Bataille, Pierre-Michel (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
C711S173000, C711SE12084
Reexamination Certificate
active
08051268
ABSTRACT:
For address management of a nonvolatile memory, the whole logical address space is divided into logical address ranges (0 to 15), and the physical address space is divided into physical areas (segments (0 to 15)). The logical address ranges are respectively associated with the physical areas (segments) to manage the addresses. The sizes of the logical address ranges are equalized. The size of the physical area (segment (0)) corresponding to the logical address range (0) in which data of high rewrite frequency such as an FAT is expected to be stored is larger than those of the other physical areas, and the logical address ranges and the physical areas are allocated. Alternatively, the sizes of the physical areas are equalized, and the size of the logical address range (0) is set as a smaller one than those of the other logical address ranges. With this, the actual rewrite frequencies of the physical areas (segments) are equal to one another, and consequently the life of the nonvolatile memory can be prolonged.
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Izumi Tomoaki
Kasahara Tetsushi
Konishi Yoshiyuki
Kunimune Daisuke
Matsuno Kiminori
Bataille Pierre-Michel
Birkhimer Christopher
Greenblum & Bernstein P.L.C.
Panasonic Corporation
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