Memory controller interface

Details Memory controller interface Memory controller interface

2005-02-04

2009-10-27

Thai, Tuan V (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S103000, C711S104000, C711S106000, C711S125000, C711S154000, C710S022000, C713S001000, C714S719000

Reexamination Certificate

active

07610433

ABSTRACT:
A memory interface controller and method to allow a processor designed and configured to operate with NOR flash and static random access memory (SRAM) memory devices to instead operate using NAND flash and synchronous dynamic random access memory (SDRAM). The system accomplishes this by caching sectors out of NAND flash into SDRAM, where the data can be randomly accessed by the processor as though it were accessing data from NOR flash/SRAM. Sectors containing data required by the processor are read out of NAND flash and written into SDRAM, where the data can be randomly accessed by the processor.

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