Memory controller having a plurality of memory regions for...

Details Memory controller having a plurality of memory regions for... Memory controller having a plurality of memory regions for...

2011-04-12

2011-04-12

Choe, Yong (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S133000, C711S162000, C714S006130, C714S054000, C714S758000

Reexamination Certificate

active

07925843

ABSTRACT:
A memory controller (1) writes data continuously to a first and a second blocks (20A), (20B) which are provided by dividing a memory region of a nonvolatile memory (2), and reads the data therefrom. The controller includes: a first writer (12A) which writes data to the first block (20A); and a second writer (12B) which writes data to the second block (20B) after completion of the writing by the first writer (12A) and a lapse of a waiting time generally equal to a length of time necessary for a power breakdown to drop a power source voltage down to a voltage value to at least disable the writing of data to the memory region.

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International Search Report for International Application PCT/JP03/00572, mailed May 13, 2003.

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