Memory controller for packet applications

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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Reexamination Certificate

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07822915

ABSTRACT:
A method and apparatus for accessing and storing data in a memory are disclosed. The system includes a memory controller coupled to a memory having locations characterized by banks and lines. The memory controller is configured for storing a data packet with data bursts in sequence in consecutive memory locations, while providing the capability of reading or writing data bursts out of sequence by accessing the consecutive memory locations in a random order.

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Sailesh Kumar et al., “Design of Randomized Multichannel Packet Storage for High Performance Routers,” Proc. of the 13thSymp. on High Performance Interconnects, HOTI. IEEE Computer Society, Washington, DC, 100-106, Aug. 17-19, 2005.

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