Memory controller for daisy chained memory chips

Details Memory controller for daisy chained memory chips Memory controller for daisy chained memory chips

2006-07-26

2009-12-01

Peugh, Brian R (Department: 2187)

Electrical computers and digital processing systems: memory

Addressing combined with specific memory configuration or...

For multiple memory modules

C711S104000, C710S305000

Reexamination Certificate

active

07627711

ABSTRACT:
A memory controller configured to control a daisy chain of memory chips. The memory controller receives read and write requests from a processor, determines a daisy chain of memory chips that the request is directed to, determines which memory chip in the chain of memory chips the request is directed to, and transmits an address/command word recognizable by the correct memory chip. The memory controller sends write data words to the daisy chain of memory chips that can be associated by the correct memory chip for writing into the correct memory chip. The memory controller receives read data words from the daisy chain of memory chips and returns the read data to the processor. The memory controller transmits a bus clock to the daisy chain of memory chips for controlling transmission of address/command words and data words.

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