Memory controller, flash memory system, and method of...

Details Memory controller, flash memory system, and method of... Memory controller, flash memory system, and method of...

2007-10-09

2007-10-09

Shah, Sanjiv (Department: 2185)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S202000

Reexamination Certificate

active

10794478

ABSTRACT:
There is disclosed a controller included in a flash memory system attachable to a memory interface of a host system. The controller performs a process for minimizing the maximum number of defective blocks to be classified into each zone, by using a plurality of replacement tables or a plurality of functions. Specifically, a dispersion process unit included in the controller associates virtual block addresses VBA with physical block addresses PBA so as to minimize the maximum number of defective blocks to be classified into each zone. The flash memory system may have a plurality of replacement tables describing correspondence between virtual block addresses VBA and physical block addresses PBA. Or, in the flash memory system, plural kinds of functions for setting correspondence between virtual block addresses VBA and physical block addresses PBA may be defined by the controller.

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