Memory controller

Details Memory controller Memory controller

2007-01-02

2007-01-02

Bataille, Pierre (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S218000

Reexamination Certificate

active

10751170

ABSTRACT:
A memory controller, such as a SDRAM controller, forms a queue of memory access requests to maximize efficient use of the bandwidth of the memory data bus. More specifically, the SDRAM controller pre-calculates the number of data bursts required to retrieve all the required data from the SDRAM, and the starting address for each of the data bursts, and queues the access requests for these data bursts such that the data bursts may be retrieved without incurring the usual read latency for each data burst.

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Aurora VLSI Inc. “AMBA Bus Master Specification” Mar. 2002, Aurora VLSI Inc.

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