Memory control device, move-in buffer control method

Details Memory control device, move-in buffer control method Memory control device, move-in buffer control method

2004-11-24

2008-11-11

Portka, Gary J (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S133000, C711S137000, C711S158000

Reexamination Certificate

active

07451274

ABSTRACT:
A central processor executes at least a load command, a store command, and a prefetch command based on an out-of-order processing for processing commands by changing the order of executing the commands. A valid move-in buffer (MIB) detector detects the number of primary cache MIBs that hold requests of a primary cache for reference to data stored in the main storage. An MIB controller controls to hold in the primary cache MIBs the reference requests according to the load command or the store command in preference to the reference requests according to the prefetch command, when the detected number of the cache buffers reaches a predetermined number.

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