Memory control device and methods thereof

Details Memory control device and methods thereof Memory control device and methods thereof

2008-09-24

2011-11-08

McCarthy, Christopher (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S043000

Reexamination Certificate

active

08055939

ABSTRACT:
A method includes establishing a first link between a first processor device and a first memory module at a first time. A second link is established between a second processor device and a second memory module at a second time. In response to receiving a first event indicator, a third link is established between the first processor device and the second memory module at a third time, the third time after the first time and the second time.

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