Memory control circuit and memory control method

Details Memory control circuit and memory control method Memory control circuit and memory control method

2009-12-03

2011-12-06

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Read/write circuit

Signals

C365S194000

Reexamination Certificate

active

08072826

ABSTRACT:
A memory control circuit includes a data sample circuit, a first delay control circuit, a second delay control circuit and a data circuit. The data sample circuit is used for generating a first data strobe signal and a second data strobe signal. The first delay control circuit is coupled to the data sample circuit, for receiving the first data strobe signal and delaying the first data strobe signal to generate a first delayed data strobe signal. The second delay control circuit is coupled to the data sample circuit, for receiving the second data strobe signal and delaying the second data strobe signal to generate a second delayed data strobe signal. The data circuit is coupled to the first delay control circuit and the second delay control circuit, for transferring data signals according to the first delayed data strobe signal and the second delayed data strobe signal.

REFERENCES:
patent: 6205046 (2001-03-01), Maesako
patent: 7385861 (2008-06-01), Zhu
patent: 2005/0007836 (2005-01-01), Morzano et al.
patent: 2008/0031079 (2008-02-01), Osawa et al.

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