Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2006-02-21
2006-02-21
Bragdon, Reginald G. (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C711S151000
Reexamination Certificate
active
07003636
ABSTRACT:
A memory control circuit includes a watching circuit for observing a first request signal from an external device for accessing to a RAM and a second request signal, which has a priority higher than the first request signal, from a CPU for accessing to the RAM. The memory control circuit further includes a control circuit having an OR gate, an AND gate and a NOR gate. When the first and second request signals are inputted, it is scheduled that an operation based on the second access request signal is performed by the control circuit prior to that based on the first access request signal.
REFERENCES:
patent: 4698753 (1987-10-01), Hubbins
patent: 2000/0156963 (2002-10-01), Duranton
Bragdon Reginald G.
Mimura Junichi
Oki Electric Industry Co. Ltd.
LandOfFree
Memory control circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Memory control circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory control circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3651938