Memory control circuit

Details Memory control circuit Memory control circuit

2005-04-26

2005-04-26

Tu, Christine T. (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C369S053100

Reexamination Certificate

active

06886120

ABSTRACT:
A memory control circuit is connected between a CPU and a memory. The memory control circuit comprises an access control circuit for controlling reading/writing access speed between the CPU and the memory. The memory control circuit further comprises a speed measurement circuit for writing predetermined data into a given address of the memory at a first speed when a speed measurement mode is specified. Thereafter the speed measurement circuit reads out the data from the given address of the memory at a second speed hat is different from the first speed. Finally, the speed measurement circuit measures an optimum speed ensuring a normal reading operation.

REFERENCES:
patent: 5392174 (1995-02-01), Suzuki
patent: 6556524 (2003-04-01), Takeshita
patent: 6567357 (2003-05-01), Kishimoto et al.
patent: 6636569 (2003-10-01), McCarthy, Jr.

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