Memory component having a novel arrangement of the bit lines

Details Memory component having a novel arrangement of the bit lines Memory component having a novel arrangement of the bit lines

2005-12-12

2008-08-19

Lam, David (Department: 2827)

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

C365S230030, C365S190000, C365S063000

Reexamination Certificate

active

07414906

ABSTRACT:
A memory component comprises a plurality of bit lines, on which memory cells are arranged, and a plurality of sense amplifiers, which are arranged in a row, each sense amplifier being connected to two bit lines. A bit line which is connected to a first sense amplifier in the row is arranged directly adjacent to a bit line which is connected to a second sense amplifier in the same row.

REFERENCES:
patent: 5396451 (1995-03-01), Ema
patent: 5586078 (1996-12-01), Takase et al.
patent: 6449182 (2002-09-01), Ooishi
patent: 6603688 (2003-08-01), Hasegawa et al.
patent: 6711050 (2004-03-01), Sadakata
patent: 2001/0028592 (2001-10-01), Sekiguchi et al.

Affiliated with

Also associated with

Rating

Memory component having a novel arrangement of the bit lines does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory component having a novel arrangement of the bit lines, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory component having a novel arrangement of the bit lines will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4002616