Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate
2008-04-08
2008-04-08
Phan, Trong (Department: 2827)
Static information storage and retrieval
Read/write circuit
Differential sensing
C365S189080, C365S194000, C365S230060, C365S226000, C365S185200
Reexamination Certificate
active
07355915
ABSTRACT:
The inventive memory circuit comprises a plurality of memory cells. The memory circuit further comprises a memory access means being controlled by at least one control signal. In addition, a control means for generating the at least one control signal is contained in the memory circuit, with the control means comprising a delay means. The delay means delays a switching of the at least one control signal. The delay time is adjustable in view of the applied supply voltage.
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Chanussot Christophe
Coste Jean-Patrice
Gouin Vincent
Infineon - Technologies AG
Patterson & Sheridan L.L.P.
Phan Trong
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