Memory circuit with spacers between ferroelectric layer and...

Details Memory circuit with spacers between ferroelectric layer and... Memory circuit with spacers between ferroelectric layer and...

2007-01-16

2007-01-16

Vu, Hung (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S306000, C257S309000, C257S310000

Reexamination Certificate

active

10804795

ABSTRACT:
A memory circuit is provided with a spacer formed on a support surface and positioned adjacent to a first electrode surface of a first electrode. The memory circuit further includes a ferroelectric layer formed on the first electrode and the spacer.

REFERENCES:
patent: 5796133 (1998-08-01), Kwon et al.
patent: 6150183 (2000-11-01), Fukuda et al.
patent: 2002/0196653 (2002-12-01), Kim et al.

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