Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2006-02-14
2006-02-14
Hoang, Huan (Department: 2827)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S189050, C365S196000, C365S201000, C365S203000, C365S207000, C365S230030
Reexamination Certificate
active
06999357
ABSTRACT:
A memory circuit has a regular memory cell array; a redundant memory cell array that can replace a failed portion in the regular memory cell array; a redundant replacement memory for storing data on the failed portion in the regular memory cell array; and a pre-charge circuit disposed in the regular memory cell array, depending on the data on the failed portion, the failed portion in the regular memory cell array is replaced with the redundant memory cell array, whilst a pre-charge path is closed which leads to the pre-charge circuit corresponding to the failed portion. This enables a common redundant replacement memory to effect a relief of the failed portion and shutoff of the pre-charge current to the failed portion.
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Sakakibara Mitsuharu
Tanishima Motoko
Arent & Fox PLLC
Fujitsu Limited
Hoang Huan
Pham Ly Duy
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