Memory circuit with improved power-down control

Details Memory circuit with improved power-down control Memory circuit with improved power-down control

1985-10-29

1988-01-05

Popek, Joseph A.

Static information storage and retrieval

Powering

Conservation of power

307 66, G11C 1300

Patent

active

047180439

ABSTRACT:
An improved memory circuit having power-down mode is disclosed. The memory is of the type having a memory cell matrix and a peripheral circuit for achieving access operation to the memory cell matrix under control of at least one control signal and is featured in that a power supply to at least a part of the peripheral circuit is stopped only when the control signal is kept inactive for a predetermined period or more, reducing the power consumption in the memory.

REFERENCES:
patent: 4451742 (1984-05-01), Aswell

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