Memory circuit with dual sense amplifier and amplifier control c

Details Memory circuit with dual sense amplifier and amplifier control c Memory circuit with dual sense amplifier and amplifier control c

1992-06-17

1994-07-26

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Differential sensing

365 49, 365207, G11C 1134

Patent

active

053331273

ABSTRACT:
For performing the coincidence detection between data stored in a memory and comparison data supplied from an external at a high speed, the positive data of a memory 1a is transmitted to a positive sense amplifier 2-1, the negative data is transmitted to a negative sense amplifier, and comparison data 5 and the inverted data thereof are respectively inputted as activating signals of the positive and negative sense amplifiers to an activating circuit. Due to the comparison data, the output of the non-activated sense amplifier always becomes "H". On the other hand, the activated sense amplifier senses and outputs its input potential. The output signals of these sense amplifiers are inputted to a coincidence signal outputting circuit to determine a coincidence signal.

REFERENCES:
patent: 4509147 (1985-04-01), Tanimura et al.
patent: 4723224 (1988-02-01), Van Hulett et al.
patent: 5034636 (1991-07-01), Reis et al.

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