Static information storage and retrieval – Read/write circuit – Accelerating charge or discharge
Patent
1990-08-16
1994-01-11
Sniezek, Andrew L.
Static information storage and retrieval
Read/write circuit
Accelerating charge or discharge
36523006, 365190, G11C 700
Patent
active
052787958
ABSTRACT:
The invention relates to a memory having a line decoder provided with a Darlington-type switching stage. When the deselection time T.sub.1 of a line is notably shorter than the intrinsic switching time T.sub.3 of a memory cell (M11 . . . Mnp), a discharge current I.sub.D is temporarily applied to the lower line conductor (1' . . . n') of the line (L1 . . . Ln) which is deselected. To achieve this, the current source I.sub.D is connected to said lower line conductors (1' . . . n') via delay circuits (RL1, DL1 . . . RLn, DLn) having a time constant T.sub.2 which is smaller than T.sub.3 and at least equal to T.sub.1.
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Barbu Stephane
Imbert Guy
Biren Steven R.
Sniezek Andrew L.
U.S. Philips Corporation
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