Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2008-07-01
2008-07-01
Britt, Cynthia (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C365S201000, C365S189050
Reexamination Certificate
active
11051128
ABSTRACT:
A memory circuit having a controllable output drive includes a storage circuit configured for at least temporarily storing a logical state of the memory circuit, and a drive control circuit coupled to the storage circuit. The drive control circuit is configurable for selectively controlling the output drive of the memory circuit.
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patent: 6288947 (2001-09-01), Kim et al.
patent: 6778431 (2004-08-01), Gogl et al.
patent: 6788586 (2004-09-01), Confalonieri et al.
patent: 1221771 (2002-10-01), None
Agere Systems Inc.
Britt Cynthia
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