Static information storage and retrieval – Read/write circuit
Patent
1994-07-26
1995-10-10
Nelms, David C.
Static information storage and retrieval
Read/write circuit
36518905, 365221, 365 49, G11C 700
Patent
active
054576547
ABSTRACT:
Data is fetched from one port of a multi-port memory circuit and loaded into another port of the same circuit for pre-loading a serial pipeline. A random access port of a DRAM circuit is used to pre-load a data signal into a serial output pipeline buffer associated with a SAM circuit in a VRAM device. The random access port accesses a particular column associated with a TAP address and reads the data for loading the first bit into the serial output buffer. The next data bit is loaded from the SAM into the serial port buffer when the first bit is output to the serial port. The time between serial clock pulses associated with the serial data path and output buffer is reduced to about 15 ns.
REFERENCES:
patent: 5115413 (1992-05-01), Sato et al.
patent: 5179372 (1993-01-01), West et al.
patent: 5229965 (1993-07-01), Inoue
patent: 5287324 (1994-02-01), Nagashima
patent: 5325502 (1994-06-01), McLaury
Micro)n Technology, Inc.
Nelms David C.
Nguyen Tan
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