Memory circuit and tracking circuit thereof

Details Memory circuit and tracking circuit thereof Memory circuit and tracking circuit thereof

2011-02-15

2011-02-15

Elms, Richard (Department: 2824)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S230060

Reexamination Certificate

active

07889583

ABSTRACT:
A tracking circuit of a memory circuit is provided. The tracking circuit is coupled between a control circuit and a sense amplifier, delays a word-line pulse signal generated by the control circuit by a delay period to generate a sense amplifier enable signal enabling the sense amplifier to detect data bits output by a memory cell array. In one embodiment, the tracking circuit comprises a plurality of dummy cells and a dummy bit line. At least one of the plurality of dummy cells comprises a plurality of cascaded transistors cascaded between the dummy bit line and a ground voltage for lowering down a dummy bit line signal on the dummy bit line when the word-line pulse signal is enabled. The dummy bit line is coupled to the dummy cells and carries the dummy bit line signal.

REFERENCES:
patent: 6738296 (2004-05-01), Sung et al.
patent: 6754131 (2004-06-01), Kirsch et al.
patent: 6996019 (2006-02-01), Song
patent: 6996020 (2006-02-01), Yoshida
patent: 2010/0118628 (2010-05-01), Wang

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