Memory circuit and method of construction

Details Memory circuit and method of construction Memory circuit and method of construction

1994-07-22

2000-06-06

Zarabin, A.

Static information storage and retrieval

Systems using particular element

Flip-flop

365154, G11C 1100

Patent

active

060727152

ABSTRACT:
A memory circuit (10) is provided. The memory circuit comprises a flip-flop (12) and first and second pass gate transistors (14) and (16). The flip-flop (12) also comprises pull down transistors (18) and (20). The gate of each pull down transistor (18) and (20) is doped at a level that is greater than the doping level for each gate of pass gate transistors (14) and (16).

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patent: 5377140 (1994-12-01), Usuki
F. Faggin et al., "Silicon Gate Technology," Solid-State Electronics, vol. 13, Aug. 1970, pp. 1125-1144.
R. Varshney, "Double Polysilicon Depletion-Mode MOS Transistor Structure," IBM Tech. Discl. Bull., vol. 22 #6, Nov. 1979, pp. 2292, 2293.

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