Memory circuit and method for writing into a target memory area

Details Memory circuit and method for writing into a target memory area Memory circuit and method for writing into a target memory area

2006-11-02

2009-06-23

Ellis, Kevin L (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C365S185020, C711S154000

Reexamination Certificate

active

07552273

ABSTRACT:
A memory circuit having a plurality of memory areas, whose order depends on respectively associated logical addresses, and which each have an associated control value, and a control means, which is designed such that the same assigns a value to a control value associated with a target memory area when writing into the same, which corresponds to the value of a lowest used memory area, when one exists, and assigns the same an arbitrary or predetermined value, when none exists, and when a predetermined condition is fulfilled, and when at least two used memory areas exist, rewrites the content of a next memory area, whose control value has a predetermined relation to the control value of the lowest memory area, and changes the control value of this memory area, when the same exists, or rewrites a content of the lowest memory area and changes the associated control value, when the next memory area, whose control value has a predetermined relation to the control value of the lowest memory area, does not exist.

REFERENCES:
patent: 5625791 (1997-04-01), Farrugia et al.
patent: 6160738 (2000-12-01), Atsumi et al.
patent: 2004/0170060 (2004-09-01), Ishimoto
patent: 103 44 625 (2004-10-01), None

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