Memory circuit and method for multivalued logic storage by proce

Details Memory circuit and method for multivalued logic storage by proce Memory circuit and method for multivalued logic storage by proce

1997-04-10

1999-02-02

Nelms, David

Static information storage and retrieval

Systems using particular element

Ternary

36518503, G11C 1156

Patent

active

058674233

ABSTRACT:
A circuit and method which enables storage of more than two logic states in a memory cell by selectively setting threshold voltages of transistors in a memory array according to the present invention. In one embodiment, a memory circuit includes an array of storage transistors. Each storage transistor has a gate connected to an associated read line. When a read line is asserted, the current which flows through a selected storage transistor is indicative of the stored logic state. The current through each transistor is individually selected by setting the threshold voltage of each storage transistor during manufacture. Different transistors in the array are configured with differing threshold voltages to thereby represent different storage states. An analog-to-digital (A/D) converter is coupled to the selected storage transistor so as to sense the current and determine the state represented. Since each cell may represent one of more than two storage states, the memory circuit may advantageously allow an increased number of bits to be stored in each memory cell, thereby increasing the storage density and reducing the cost per bit.

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patent: 5638320 (1997-06-01), Wong et al.

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