Memory circuit and control method thereof

Static information storage and retrieval – Read/write circuit – Particular write circuit

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S191000, C365S154000, C365S156000

Reexamination Certificate

active

07839704

ABSTRACT:
A memory circuit having a global signal driving circuit, which, when a first read signal is inputted from a first bit signal line with a column signal inputted from a column signal line, outputs the first read signal as a global signal from a global signal line, and, when a first driving write signal is inputted from the first bit signal line, inhibits the first driving write signal from being outputted to the global signal line on the basis of a first write signal inputted from a first write signal line.

REFERENCES:
patent: 5973984 (1999-10-01), Nagaoka
patent: 7573757 (2009-08-01), Ha et al.
patent: 11-110969 (1999-04-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Memory circuit and control method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory circuit and control method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory circuit and control method thereof will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4194290

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.