Memory circuit

Static information storage and retrieval – Read/write circuit – Data refresh

Patent

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Details

365210, G11C 1140

Patent

active

045009740

ABSTRACT:
A memory circuit capable of detecting that refresh operation is surely ended is disclosed. The memory circuit comprises a memory cell matrix, a dummy array sharing rows with the memory cell matrix and similar column structure to the memory cell matrix, and means coupled to a pair of digit lines of the dummy array for detecting that a potential at either of the pair of digit lines in the dummy array reaches an amplified low level.

REFERENCES:
patent: 4371956 (1983-02-01), Maeda et al.

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