Static information storage and retrieval – Read/write circuit – For complementary information
Patent
1982-03-01
1984-08-21
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
For complementary information
365203, G11C 700
Patent
active
044674562
ABSTRACT:
A high density static RAM integrated circuit including a pair of bit lines to which pull-up loads are respectively connected, a plurality of memory cells which are connected across the pair of bit lines, a pair of data buses which are connected to the pair of bit lines, and a sense amplifier which is connected to the pair of bit lines through the pair of data buses, the pair of data buses being respectively provided with charging circuits each of which has a control terminal for varying a pull-up current, amplified outputs of the sense amplifier being fed back to the control terminals of the charging circuits, the data bus on a high potential side being charged by the corresponding charging circuit. As a result, the current which flows across a common data bus line connected to a higher side of the selected bit lines is increased, thereby enabling a high speed read out operation in the high density static RAM.
REFERENCES:
patent: 4348747 (1982-09-01), Takahashi
patent: 4379344 (1983-04-01), Ozawa et al.
Fujitsu Limited
Popek Joseph A.
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