Memory circuit

Details Memory circuit Memory circuit

1980-08-08

1982-06-01

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Differential sensing

365184, G11C 1140

Patent

active

043331688

ABSTRACT:
A plurality of single transistor memory cells with electrically charged capacitors and two similar dummy memory cells are electrically coupled in symmetric relationship to a sense amplifier for each row of the disclosed memory circuit. An address signal selects a word line connected to the memory cell on one side of the amplifier and a dummy word line connected to the dummy memory cell on its other side and applies a word signal to the selected word lines, in order to read out electric charges on the capacitors, and the amplifier amplifies a potential difference due to the read charges. For each row two dummy word lines are connected to delay means coupled to the amplifier to form an activating signal for the amplifier by delaying a potential rise developed on the selected dummy word line.

REFERENCES:
patent: 4270190 (1981-05-01), Jindra et al.

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