Memory circuit

Details Memory circuit Memory circuit

1991-11-19

1994-03-15

LaRoche, Eugene R.

Static information storage and retrieval

Systems using particular element

Semiconductive

365207, 365208, G11C 706

Patent

active

052950948

ABSTRACT:
A memory circuit incorporating a current-mirror type amplifier which directly amplifies a varied potential of a pair of bit lines. As soon as the word line goes High, the current-mirror type amplifier is simultaneously activated to amplify a minimal difference (100 mV) of potential between these bit lines. Data signal outputted from the current-mirror type amplifier is then transmitted to a read-only signal line. As a result, data is quickly read out before a built-in sense amplifier completes amplification, thus quickly achieving an accessing operation at extremely fast speed.

REFERENCES:
patent: 4945517 (1990-07-01), Miyatake et al.
patent: 4970689 (1990-11-01), Kenney
patent: 4984206 (1991-01-01), Kamatsu et al.
patent: 5075887 (1991-12-01), Magome et al.
patent: 5079748 (1992-01-01), Miyatake et al.
Nakagome et al., "Low-Voltage High-Speed Circuit Technology for 64 Mb DRAMs", Society for Electronic Communication, IC Meeting, 1990.
Nakagome et al., 1987 Symposium on VLSI Circuits, pp. 17-18.
Yanagisawa et al., "A 23ns 1 Mbit BiCMOS DRAM", 1987 Symposium on VLSI Circuits, pp. 184-186.

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