Memory cell with stored charge on its gate and process for the m

Details Memory cell with stored charge on its gate and process for the m Memory cell with stored charge on its gate and process for the m

1997-12-24

2000-08-15

Phan, Trong

Static information storage and retrieval

Systems using particular element

Semiconductive

36518526, 365149, 365 72, G11C 1604

Patent

active

061046396

ABSTRACT:
A memory cell with a stored charge on its gate, comprising (A) a channel forming region, (B) a first gate formed on an insulation layer formed on the surface of the channel forming region, the first gate and the channel forming region facing each other through the insulation layer, (C) a second gate capacitively coupled with the first gate, (D) source/drain regions formed in contact with the channel forming region, one source/drain region being spaced from the other, and (E) a non-linear resistance element having at least two ends with one end connected to the first gate.

REFERENCES:
patent: 5506436 (1996-04-01), Hayashi et al.
patent: 5576571 (1996-11-01), Hayashi et al.
patent: 5578852 (1996-11-01), Hayashi et al.
patent: 5578853 (1996-11-01), Hayashi et al.
patent: 5581106 (1996-12-01), Hayashi et al.

Affiliated with

Also associated with

Rating

Memory cell with stored charge on its gate and process for the m does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory cell with stored charge on its gate and process for the m, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory cell with stored charge on its gate and process for the m will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2014411