Memory cell with non-volatile memory elements

Details Memory cell with non-volatile memory elements Memory cell with non-volatile memory elements

1979-08-28

1981-09-01

Hecker, Stuart N.

Static information storage and retrieval

Systems using particular element

Flip-flop

365184, G11C 1140

Patent

active

042875749

ABSTRACT:
A non-volatile memory cell has a pair of inverter circuits. In each inverter circuit, first and second insulated gate transistors of the first channel type and a third insulated gate transistor of the second channel type are serially connected in this order. The gates of the first transistor and the third transistor are commonly connected each other thereby to form an input terminal. A control terminal is formed at the gate of the second transistor. An output terminal is formed at either the source or the drain of the second transistor. The input terminal of one of the inverter is connected to the output terminal of the other inverter, while the output terminal of the former, to the input terminal of the latter. The control terminal is connected to a common control terminal. In this way, a complementary bistable circuit is formed. Non-volatile memory elements are connected to the connection points between the first and second transistors, respectively.

REFERENCES:
patent: 4091460 (1978-05-01), Schuermeyer et al.
patent: 4103185 (1978-07-01), Denes
patent: 4132904 (1979-01-01), Harari

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