Static information storage and retrieval – Read/write circuit – Including specified plural element logic arrangement
Patent
1988-02-18
1990-03-20
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Including specified plural element logic arrangement
365154, G11C 700
Patent
active
049107127
ABSTRACT:
Disclosed is a memory cell which includes a plurality of pass gates in the read word and write word lines. The pass gates are connected in series and each pass gate is controlled by a separate line, namely, by a write word line or a read word line. By use of two or more pass gates in this manner, logical functions, such as logical AND functions are performed within the memory cell.
REFERENCES:
patent: 4447891 (1984-05-01), Kadota
Camarota Rafael C.
Wang H. William
Popek Joseph A.
Saratoga Semiconductor Corporation
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