Memory cell, wafer, semiconductor component with memory cell...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S296000, C257S300000, C257S302000, C257S303000, C257S304000, C257S305000

Reexamination Certificate

active

06876026

ABSTRACT:
The invention relates to a DRAM memory cell having a trench filled with conductive material connected to a selection transistor by a connection having a vertical insulation collar arranged perpendicularly to a layer sequence of the memory cell. The vertical insulation collar is connected to a lateral insulation collar of the trench. This lateral insulation collar essentially extends perpendicular to the vertical insulation collar or is arranged laterally with respect to the vertical insulation collar. It is thus possible to provide a memory cell, a wafer and a semiconductor component that have a high integration density and a sufficient dielectric strength, and that efficiently suppress parasitic transistors. A method for fabricating a lateral insulating collar for a memory cell is also described.

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patent: 100 30 696 (2002-01-01), None
patent: 100 45 694 (2002-04-01), None
patent: WO 0117019 (2001-03-01), None

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