Memory cell testing feature

Static information storage and retrieval – Read/write circuit

Reexamination Certificate

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C365S203000, C365S204000

Reexamination Certificate

active

07110303

ABSTRACT:
An electronic memory device includes at least one memory cell, a write circuit that defines an output node and mediates a discharge associated with a write operation flowing to the output node, and a write strength selection circuit that modifies at least one characteristic of the discharge. A method for testing data retention of an electronic memory device includes providing a write circuit, storing a value in at least one memory cell of the memory device, directing a weak write operation to the at least one memory cell, and sensing the memory cell to determine if the stored value changed in response to the weak write operation.

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Ding-Ming Kwai et al., “Detection of SRAM Cell Stability by Lowering Array Supply Voltage”, Proceedings of the 9thAsian Test Symposium, 2000 IEEE.
Anne Meixner et al., “Weak Write Test Mode: An SRAM Cell Stability Design For Test”, pp. 309-318, IEEE 1996.

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