Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2011-08-16
2011-08-16
Richards, N Drew (Department: 2895)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C438S244000, C438S387000, C257SE27098, C257SE21008, C257S903000
Reexamination Certificate
active
07999300
ABSTRACT:
A memory cell includes a substrate, an access transistor and a storage capacitor. The access transistor comprising a gate stack disposed on the substrate, and a first and second diffusion region located on a first and second opposing sides of the gate stack. The storage capacitor comprises a first capacitor plate comprising a portion embedded within the substrate below the first diffusion region, a second capacitor plate and a capacitor dielectric sandwiched between the embedded portion of the first capacitor plate. At least a portion of the first diffusion region forms the second capacitor plate.
REFERENCES:
patent: 4894695 (1990-01-01), Ishii et al.
patent: 4925805 (1990-05-01), van Ommen et al.
patent: 5066607 (1991-11-01), Banerjee
patent: 5134085 (1992-07-01), Gilgen et al.
patent: 5427975 (1995-06-01), Sparks et al.
patent: 5449630 (1995-09-01), Lur et al.
patent: 5504027 (1996-04-01), Jeong et al.
patent: 5897351 (1999-04-01), Forbes
patent: 5998820 (1999-12-01), Chi
patent: 6008104 (1999-12-01), Schrems
patent: 6078087 (2000-06-01), Huang et al.
patent: 6136638 (2000-10-01), Lee et al.
patent: 6184071 (2001-02-01), Lee
patent: 6245636 (2001-06-01), Maszara
patent: 6331459 (2001-12-01), Gruening
patent: 6344390 (2002-02-01), Bostelmann et al.
patent: 6410391 (2002-06-01), Zelsacher
patent: 6468855 (2002-10-01), Leung et al.
patent: 6475906 (2002-11-01), Lee
patent: 6569732 (2003-05-01), Chiang et al.
patent: 6573548 (2003-06-01), Leung et al.
patent: 6614094 (2003-09-01), Leonardi et al.
patent: 6670253 (2003-12-01), Lee
patent: 6975531 (2005-12-01), Forbes
patent: 7064371 (2006-06-01), Chin et al.
patent: 7229894 (2007-06-01), Koh
patent: 7348235 (2008-03-01), Fujiishi
patent: 7462563 (2008-12-01), Feustel et al.
patent: 7605443 (2009-10-01), Ogura
patent: 7619266 (2009-11-01), Mouli
patent: 7638390 (2009-12-01), Lee et al.
patent: 7638828 (2009-12-01), Schoellkopf
patent: 7714370 (2010-05-01), Kurachi
patent: 7863130 (2011-01-01), Hierlemann et al.
patent: 2002/0182787 (2002-12-01), Bae
patent: 2004/0229424 (2004-11-01), Fischer et al.
patent: 2004/0229426 (2004-11-01), Lee et al.
patent: 2004/0262695 (2004-12-01), Steegan et al.
patent: 2006/0017115 (2006-01-01), Tu et al.
patent: 2006/0022242 (2006-02-01), Sugatani et al.
patent: 2006/0040466 (2006-02-01), Sandhu et al.
patent: 2006/0170044 (2006-08-01), Tu
patent: 2006/0232909 (2006-10-01), Schoellkopf
patent: 2007/0045763 (2007-03-01), Yang
patent: 2007/0080387 (2007-04-01), Liu et al.
patent: 2008/0073688 (2008-03-01), Tu et al.
patent: 2008/0224228 (2008-09-01), Teo et al.
Chee Jeffrey
Lai Chung Woh
Lee James Yong Meng
Lun Zhao
Mishra Shailendra
Globalfoundries Singapore Pte. Ltd.
Horizon IP Pte Ltd
Richards N Drew
Singal Ankush k
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