Memory cell, read device for memory cell, memory assembly,...

Static information storage and retrieval – Addressing – Multiple port access

Reexamination Certificate

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C365S189040, C365S189150, C365S189160

Reexamination Certificate

active

07606107

ABSTRACT:
A memory cell includes transistors and two read ports. Each read port is configured to be connected to a read line. The memory cell is configured such that in a read operation of the memory cell an information stored in the memory cell is readable by a differential reading including an evaluation of an electric current between the two read ports.

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Regitz, William M. et al., “Three-Transistor-Cell 1024-Bit 500-ns MOS RAM,” IEEE Journal of Solid-State Circuits, vol. SC-5, No. 5, pp. 181-186 (Oct. 1970).

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