Memory cell programming method and semiconductor memory device

Details Memory cell programming method and semiconductor memory device Memory cell programming method and semiconductor memory device

2011-01-04

2011-01-04

Nguyen, Tuan T (Department: 2824)

Static information storage and retrieval

Floating gate

Multiple values

C365S185050, C365S185180

Reexamination Certificate

active

07864571

ABSTRACT:
A memory cell programming method and related semiconductor memory device are disclosed. The method involves receiving and latching first through nth bits of write data in a corresponding plurality of first through nth latches, and programming a kth bit of write data in the memory cell, where k ranges from 2 to n, in relation to first through k−1th bits of write data previously stored in the memory cell.

REFERENCES:
patent: 7298648 (2007-11-01), Lee et al.
patent: 7457158 (2008-11-01), Lee et al.
patent: 2007/0035995 (2007-02-01), Crippa et al.
patent: 2004118940 (2004-04-01), None
patent: 2004206833 (2004-07-01), None
patent: 1020050007653 (2005-01-01), None

Affiliated with

Also associated with

Rating

Memory cell programming method and semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory cell programming method and semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory cell programming method and semiconductor memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2701008