Memory cell programming method and semiconductor device for...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185030, C365S185280, C365S185330

Reexamination Certificate

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07911842

ABSTRACT:
Provided are a memory cell programming method and a semiconductor device which may be capable of simultaneously writing a bit of data and then another bit of the data to a plurality of memory blocks. The memory programming method, in which M bits of data are written to a plurality of memory blocks, may include a data division operation and a data writing operation where M may be a natural number. In the data division operation, the plurality of memory blocks may be divided into a plurality of memory block groups. In the data writing operation, an ithbit of the data may be simultaneously written to two or more memory block groups from among the plurality memory block groups, and then an i+1thbit of the data may be simultaneously written to the two or more memory block groups from among the plurality memory block groups, where i is a natural number less than M.

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