Memory cell, memory device and method of fabricating the same

Static information storage and retrieval – Systems using particular element – Capacitors

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365174, 365149, G11C 700

Patent

active

057904510

ABSTRACT:
A memory device and method of forming the same, includes a plurality of wordlines for applying a cell driving signal, a plurality of bitlines for inputting or outputting data, and a plurality of cells, each cell having a first gate, source and drain electrodes and a second gate, wherein either the first or second gate is connected to one of the wordlines, the source electrode is connected to one of the bitlines, and the drain electrode is connected to either the first or second gate which is not connected to the one wordline.

REFERENCES:
patent: 4872042 (1989-10-01), Maeda et al.
patent: 5220530 (1993-06-01), Itoh
patent: 5355330 (1994-10-01), Hisamoto et al.
A Capacitorless DRAM Cell on SOI Substrate, Hsing-jen Wann and Chenming Hu, Department of Electrical Engineering and Computer Sciences University of California at Berkeley, CA 94720, pp. 26.4.1 to 26.4.4.

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