Memory cell having hot-hole injection erase mode

Details Memory cell having hot-hole injection erase mode Memory cell having hot-hole injection erase mode

1985-09-26

1988-05-03

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Erase

365104, 365185, G11C 700

Patent

active

047424915

ABSTRACT:
A single component electrically erasable memory cell is disclosed. A floating gate MOSFET having a relatively short channel is triggered into a snap-back mode positive feedback biasing mechanism. Hot-hole injection onto the floating gate during the snap-back mode neutralizes any charge stored there to represent a data bit.

REFERENCES:
patent: 4503519 (1985-03-01), Arakawa
Y. N. Hsieh et al., "Double Polysilicon Electrically Alterable Read-Only Storage Cell", IBM Technical Disclosure Bulletin, vol. 23, No. 1, Jun. 1980, pp. 227-228.
G. Yaron et al., "E.sup.2 FAMOS-An Electrically Eraseable Reprogrammable Charge Storage Device", IEEE Transactions on Electron Devices, vol. ED-26, No. 11, Nov. 1979, pp. 1754-1759.

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