Memory cell having asymmetrical source/drain pass transistors an

Details Memory cell having asymmetrical source/drain pass transistors an Memory cell having asymmetrical source/drain pass transistors an

1996-05-02

1998-08-04

Nelms, David C.

Static information storage and retrieval

Systems using particular element

Flip-flop

365178, 257393, 257903, 257904, 257906, G11C 11412

Patent

active

057904529

ABSTRACT:
A memory cell having an asymmetrical transistor which provides access to a data storage circuit of the memory cell. The asymmetrical transistor exhibits a forward threshold voltage when forward biased and a reverse threshold voltage when reverse biased. The forward threshold voltage is less than the reverse threshold voltage. The asymmetrical transistor is connected such that during write-disturb mode, the asymmetrical transistor is reverse biased to provide a relatively high reverse threshold voltage. This high reverse threshold voltage minimizes subthreshold current leakage during write-disturb mode, thereby reducing the possibility of data corruption. During read mode, the asymmetrical transistor is forward biased to provide a relatively low forward threshold voltage. This low forward threshold voltage maximizes the read voltage applied to the data storage circuit through the asymmetrical transistor, thereby improving the stability of the memory cell.

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