Memory cell for DRAM embedded in logic

Details Memory cell for DRAM embedded in logic Memory cell for DRAM embedded in logic

1998-08-14

2000-06-13

Nelms, David

Static information storage and retrieval

Systems using particular element

Capacitors

36518909, G11C 1124

Patent

active

060757205

ABSTRACT:
A structure which stores charge useful in a DRAM provides small cell size and eliminates subthreshold leakage current of the access transistor in the cell. Hence this is highly suitable for use for instance in ASICs (applications specific integrated circuits) which are fabricated using "logic" circuit fabrication techniques which normally do not accommodate DRAM cells. The DRAM charge storage structure includes a p-channel access transistor and an n-doped well in a p-doped substrate, a p-channel charge storage capacitor with its source/drain directly connected to the source region of the access field effect transistor, a source of a voltage to the gate of the storage capacitor, and a voltage source connected to the wordline and thereby to the gate terminal of the access transistor which switches between two voltage levels.

REFERENCES:
patent: 5198995 (1993-03-01), Dennard et al.
patent: 5394365 (1995-02-01), Tsukikawa
patent: 5694355 (1997-12-01), Skjaveland et al.

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