Memory cell dual protection

Details Memory cell dual protection Memory cell dual protection

2007-04-17

2007-04-17

Mack, Ricky (Department: 2873)

Optical: systems and elements

Optical modulator

C359S245000, C359S248000, C359S295000

Reexamination Certificate

active

11004595

ABSTRACT:
A spatial light modulator for use in projection display applications is provided. The spatial light modulator includes a substrate including a plurality of electrically active circuits and an electrode layer electrically coupled to at least one of the plurality of electrically active circuits. In one embodiment, the electrode layer includes a semi-continuous layer with at least one optical path. The spatial light modulator also includes a shielding layer electrically isolated from the electrode layer and disposed between the substrate and the plurality of electrically active circuits and an electrical connector coupling the shielding layer to a reference potential. In a specific embodiment, the shielding layer of the spatial light modulator converts incident light energy to electrical current and routes the current back to a source. In another specific embodiment, the shielding layer converts electrical field disturbance to electrical current and routes the current back to a source.

REFERENCES:
patent: 4229732 (1980-10-01), Hartstein et al.
patent: 4317611 (1982-03-01), Petersen
patent: 4508640 (1985-04-01), Kanda et al.
patent: 4566935 (1986-01-01), Hornbeck
patent: 4615595 (1986-10-01), Hornbeck
patent: 5061049 (1991-10-01), Hornbeck
patent: 5172262 (1992-12-01), Hornbeck
patent: 5311360 (1994-05-01), Bloom et al.
patent: 5382961 (1995-01-01), Gale, Jr.
patent: 5448314 (1995-09-01), Heimbuch et al.
patent: 5452024 (1995-09-01), Sampsell
patent: 5489952 (1996-02-01), Gove et al.
patent: 5504614 (1996-04-01), Webb et al.
patent: 5535047 (1996-07-01), Hornbeck
patent: 5583688 (1996-12-01), Hornbeck
patent: 5589852 (1996-12-01), Thompson et al.
patent: 5600363 (1997-02-01), Anzaki et al.
patent: 5600383 (1997-02-01), Hornbeck
patent: 5661591 (1997-08-01), Lin et al.
patent: 5663749 (1997-09-01), Farris et al.
patent: 5742419 (1998-04-01), Dickensheets et al.
patent: 5757536 (1998-05-01), Ricco et al.
patent: 5818095 (1998-10-01), Sampsell
patent: 5835256 (1998-11-01), Huibers
patent: 5885468 (1999-03-01), Kozlowski
patent: 5939171 (1999-08-01), Biebl
patent: 5999306 (1999-12-01), Atobe et al.
patent: 6038056 (2000-03-01), Florence et al.
patent: 6046840 (2000-04-01), Huibers
patent: 6049317 (2000-04-01), Thompson et al.
patent: 6127756 (2000-10-01), Iwaki et al.
patent: 6172797 (2001-01-01), Huibers
patent: 6201521 (2001-03-01), Doherty
patent: 6252277 (2001-06-01), Chan et al.
patent: 6323982 (2001-11-01), Hornbeck
patent: 6337760 (2002-01-01), Huibers et al.
patent: 6356378 (2002-03-01), Huibers
patent: 6386661 (2002-05-01), Woerner
patent: 6396619 (2002-05-01), Huibers et al.
patent: 6429033 (2002-08-01), Gee et al.
patent: 6529310 (2003-03-01), Huibers et al.
patent: 6538800 (2003-03-01), Huibers
patent: 6542653 (2003-04-01), Wu et al.
patent: 6543286 (2003-04-01), Garverick et al.
patent: 6809852 (2004-10-01), Tao et al.
patent: 6856068 (2005-02-01), Miller et al.
patent: 2002/0041455 (2002-04-01), Sawada et al.
patent: 2002/0071166 (2002-06-01), Jin et al.
patent: 2002/0071169 (2002-06-01), Bowers et al.
patent: 2002/0132389 (2002-09-01), Patel et al.
patent: 2003/0117686 (2003-06-01), DiCarlo
patent: 2003/0207487 (2003-11-01), Kubena et al.
patent: 2004/0000696 (2004-01-01), Ma et al.
patent: 2004/0004753 (2004-01-01), Pan
patent: 2004/0008402 (2004-01-01), Patel et al.
patent: 2001/0136044 (2004-07-01), Miller et al.
patent: 2004/0125347 (2004-07-01), Patel et al.
patent: 2004/0136044 (2004-07-01), Miller et al.
patent: 2004/0184133 (2004-09-01), Su et al.
patent: 2004/0190817 (2004-09-01), Aubuchon
patent: 2005/0041277 (2005-02-01), Huibers
patent: 1237032 (2002-09-01), None
Henley et al., “A New SOI Manufacturing Technology Using Atomic layer Cleaving.” Silicon Genesis Corporation Campbell CA. pp. 1-5.
Henley et al., “A New SOI Manufacturing Technology Using Atomic layer Cleaving.” Silicon Genesis Corporation Campbell CA. pp. 1-5, no date available.

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