Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1999-01-15
1999-11-30
Hardy, David B.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257329, H01L 27112
Patent
active
059947462
ABSTRACT:
The memory cell has transistors that are arranged three-dimensionally. Vertical MOS transistors are arranged on the sidewalls of semiconductor webs, and a plurality of transistors are arranged one above the other on each sidewall. The transistors that are arranged one above the other on a sidewall are connected in series.
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Japanese Patent Application No. 5-145042 (Hyodo), dated Jun. 11, 1993.
Hofmann Franz
Krautschneider Wolfgang
Reisinger Hans
Stengl Reinhard
Willer Josef
Greenberg Laurence A.
Hardy David B.
Lerner Herbert L.
Siemens Aktiengesellschaft
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