Memory cell circuit independently controlled in writing and read

Details Memory cell circuit independently controlled in writing and read Memory cell circuit independently controlled in writing and read

1995-10-25

1997-01-07

Nelms, David C.

Static information storage and retrieval

Systems using particular element

Flip-flop

365156, 365149, 36518901, G11C 1134

Patent

active

055924140

ABSTRACT:
A memory cell circuit which enables reduction of the leak current between a bit line and a memory cell and enables realization of a high speed reading operation and writing operation, wherein a write only circuit and a read only circuit are constructed by a drive transistor and a select transistor, the drive transistor comprising an enhancement type transistor with a threshold voltage set lower than the threshold voltage of the select transistor.

REFERENCES:
patent: 5060192 (1991-10-01), Young et al.
patent: 5325338 (1994-06-01), Runaldue et al.
patent: 5414657 (1995-05-01), Okimura
patent: 5469380 (1995-11-01), Iio

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