Memory cell array and non-volatile memory device

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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Details

C365S230030, C365S185210, C365S196000

Reexamination Certificate

active

08050094

ABSTRACT:
A memory cell array, divided into multiple row memory cell arrays, includes multiple memory banks and sense amplifiers. Each of the memory banks includes multiple logical sectors and at least two sub-memory banks of multiple sub-memory banks. The at least two sub-memory banks are included in different row memory cell arrays, and each of the sub-memory banks includes multiple physical sectors. The sense amplifiers are dedicated to the sub-memory banks, respectively.

REFERENCES:
patent: 5768174 (1998-06-01), Seo et al.
patent: 6587374 (2003-07-01), Takagi et al.
patent: 6850446 (2005-02-01), Raszka et al.
patent: 7009880 (2006-03-01), Liu
patent: 2000-207892 (2000-07-01), None

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