Static information storage and retrieval – Systems using particular element – Capacitors
Patent
1995-07-13
1997-11-25
Yoo, Do Hyun
Static information storage and retrieval
Systems using particular element
Capacitors
365105, 365175, 365184, 365203, G11C 700
Patent
active
056919344
ABSTRACT:
An extremely compact dynamic memory cell (200) includes a capacitor (204) or any other suitable stored charge device, and a diode (208) such as a Zener diode, a pair of parallel, reverse-connected diodes, or any other suitable voltage dropping device having substantially definite voltage drops when conducting in each direction. The capacitor and Zener diode are connected in series between a Row Select line (202) and a Column Bit line (210). These structures are suitable for fabrication by any of a variety of processes used to fabricate conventional semiconductor DRAMs. The memory cell is replicated millions of times and arrayed in rows and columns as in conventional one-transistor MOSFET DRAM memories to form a memory integrated circuit. Rows of cells are accessed by asserting the corresponding Row Select line, and columns are accessed by asserting the Column Bit line. Circuits suitable for controlling these Row Select and Column Bit line operations are similar to those used in traditional one-transistor cell DRAMs, but are modified to apply suitable voltage sequences during inactive periods and during memory read/rewrite and write operations. Suitable voltages and voltage sequence for operating the dynamic memory cell in its various modes include an ideal voltage relationship as well as an exemplary set of voltages and sequences.
REFERENCES:
patent: 2823368 (1958-02-01), Avery
patent: 4023148 (1977-05-01), Heuber et al.
patent: 4920513 (1990-04-01), Takeshita et al.
patent: 5063539 (1991-11-01), Rallapalli
patent: 5267192 (1993-11-01), Nogami
patent: 5357465 (1994-10-01), Challa
patent: 5361225 (1994-11-01), Ozawa
patent: 5408431 (1995-04-01), Challa
patent: 5414658 (1995-05-01), Challa
patent: 5471087 (1995-11-01), Buerger, Jr.
patent: 5483482 (1996-01-01), Yamada et al.
patent: 5508955 (1996-04-01), Zimmer et al.
patent: 5535156 (1996-07-01), Levy et al.
Paper entitled "Principles of CMOS VLSI Design-A Systems Perspective", by Neil H. E. Weste and Kamran Eshraghian, publisibed by Addison-Wesley Publishing Co., pp. 362-364, .COPYRGT.1985 by AT&T Bell Laboratories, Inc. and K. Eshraghian.
Carroll David H.
Yoo Do Hyun
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